july 2006 rev 2 1/9 EMIF06-1502M12 6 line low capacitance emi filter and esd protection ipad? in micro qfn package main product characteristics where emi filtering in esd sensitive equipment is required: lcd & camera for mobile phones computers and printers communication systems mcu boards description the EMIF06-1502M12 is a 6 line highly integrated device designed to suppress emi/rfi noise in all systems exposed to electromagnetic interference. this filter includes esd protection circuitry, which prevents damage to the application when subjected to esd surges up to 15 kv on the input pins. benefits emi asymmetrical (i/o) low-pass filter high efficiency in emi filtering very low pcb space consuming: 2.5 mm x 1.5 mm very thin package: 0.6 mm max high efficiency in esd su ppression on inputs pins (iec 61000-4-2 level 4). high reliability offered by monolithic integration high reducing of parasitic elements through integration and wafer level packaging. lead free package complies with following standards: pin configuration (top view) basic cell configuration order code tm: ipad is a trademar k of stmicroelectronics iec 61000-4-2 level 4 input pins 15kv (air discharge) 8kv (contact discharge) mil std 883e - method 3015-6 class 3 (all pins) part number marking EMIF06-1502M12 e 1 2 3 4 gnd 5 6 12 11 10 9 8 7 1 2 3 4 gnd 5 6 12 11 10 9 8 7 micro qfn 2.5 mm x 1.5 mm (bottom view) 1 input output 12 output 11 output 10 output 9 output 8 output 7 2 input 3 input 4 input 5 input 6 input typical line capacitance = 14 pf @ 2.5 v 170 ? input output www.st.com
characteristics EMIF06-1502M12 2/9 1 characteristics table 1. absolute ratings (limiting values at t amb = 25 c unless otherwise specified) symbol parameter value unit v pp esd discharge iec 61000-4-2 air discharge on input pins esd discharge iec 61000-4-2 contact discharge on input pins 15 8 kv t j junction temperature 125 c t op operating temperature range -40 to + 85 c t stg storage temperature range -55 to +150 c table 2. electrical characteristics (t amb = 25 c) symbol parameter v br breakdown voltage i rm leakage current @ v rm v rm stand-off voltage v cl clamping voltage r d dynamic resistance i pp peak pulse current r i/o series resistance between input & output c line input capacitance per line v br i pp v rm v f i f i i rm i r v v cl symbol test conditions min. typ. max. unit v br i r = 1 ma 6 8 10 v i rm v rm = 3 v per line 100 na r i/o tolerance 10% 153 170 187 ? c line v r = 2.5 v dc, v osc = 30 mv, f = 1 mhz 14 pf figure 1. s21(db) attenuation measurement f igure 2. analog cross talk measurements db 100.0k 1.0m 10.0m 100.0m 1.0g -45.00 -30.00 -15.00 0.00 f (hz) 100.0k 1.0m 10.0m 100.0m 1.0g -100.00 -90.00 -80.00 -70.00 -60.00 -50.00 -40.00 -30.00 -20.00 -10.00 0.00 100.0k 1.0m 10.0m 100.0m 1.0g -100.00 -90.00 -80.00 -70.00 -60.00 -50.00 -40.00 -30.00 -20.00 -10.00 0.00 db f (hz)
EMIF06-1502M12 ordering information scheme 3/9 2 ordering information scheme figure 3. esd response to iec 61000-4-2 (+15 kv air discharge) on one input (v in ) and on one output (v out ) figure 4. esd response to iec 61000-4-2 (- 15 kv air discharge) on one input (v in ) and on one output (v out ) figure 5. line capacitance versus reverse voltage applied (typical value) c1 = 10 v/d v in c2 = 5 v/d v out 100 ns/d c1 = 10 v/d c2 = 5 v/d 100 ns/d v in v out 0 2 4 6 8 10 12 14 16 18 20 22 24 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 c line (pf) v line (v) emif yy - xxx z mx emi filter number of lines information package x = resistance value (ohms) z = capacitance value / 10(pf) mx = micro qfn x leads
package information EMIF06-1502M12 4/9 3 package information table 3. qfn 2.5 x 1.5 package dimensions ref dimensions millimeters inches min typ max min typ max a 0.500.550.600.200.220.24 a1 0.00 0.02 0.05 0.00 0.01 0.02 b 0.150.180.250.060.070.10 d 2.50 0.98 d2 1.70 1.80 1.90 0.67 0.71 0.75 e 1.50 0.59 e2 0.30 0.40 0.50 0.12 0.16 0.24 e 0.40 0.16 k 0.20 0.08 l 0.250.300.350.100.120.14 figure 6. footprint figure 7. marking dot: pin 1 identification x = marking yww= data code (y=year ww= week xy ww xy ww
EMIF06-1502M12 package information 5/9 figure 8. tape and reel specification in order to meet environmental requirements, st offers these devices in ecopack? packages. these packages have a lead-free second level interconnect. the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com. 4.00+/-0.1 1.75 +/- 0.1 4.00 f 1.5 +/- 0.1 3.5 +/- 0.05 user direction of unreeling 8.1 +/- 0.1 0.75 1.70 2.70 2.0+/-0.05 xy ww xy ww xy ww 4.00+/-0.1 1.75 +/- 0.1 4.00 f 1.5 +/- 0.1 3.5 +/- 0.05 user direction of unreeling 8.1 +/- 0.1 0.75 1.70 2.70 2.0+/-0.05 xy ww xy ww xy ww xy ww xy ww xy ww
recommendation on pcb assembly EMIF06-1502M12 6/9 4 recommendation on pcb assembly 4.1 stencil opening design 1. general recommendation on stencil opening design a) stencil opening dimensions: l (length), w (width), t (thickness). b) general design rule stencil thickness (t) = 75 ~ 125 m 2. reference design a) stencil opening thickness: 100 m b) stencil opening for central exposed pad: opening to footprint ratio is 50%. example: stencil opening l = 1224 m, w = 300 m, footprint (see figure 6. ) l = 1800 m, w = 400 m. c) stencil opening for leads: opening to footprint ratio is 90%. example: stencil opening l = 570 m, w = 190 m, footprint (see figure 6. ) l = 600 m, w = 200 m. 4.2 solder paste 1. halide-free flux qualification rol0 according to ansi/j-std-004. 2. ?no clean? solder paste is recommended. 3. offers a high tack force to resist component movement during high speed 4. solder paste with fine particles: powder particle size is 20-45 m. 4.3 placement 1. manual positioning is not recommended. 2. it is recommended to use the lead recognition capabilities of the placemen t system, not the outline centering 3. standard tolerance of 0.05 mm is recommended. l t w aspect ratio w t ----- 1.5 = aspect area lw 2t l w + () --------------------------- - 0.66 =
EMIF06-1502M12 recommendation on pcb assembly 7/9 4. 3.5 n placement force is recommended. too much placement force can lead to squeezed out solder paste and cause solder joints to short. too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. to improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. for assembly, a perfect supporting of the pcb (all the more on flexible pcb) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. 4.4 pcb design preference 1. to control the solder paste amount, the closed via is recommended instead of open vias. 2. the position of tracks and open vias in the solder area should be well balanced. the symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. 4.5 reflow profile note: minimize air convection currents in the reflow oven to avoid component movement. parameters tin-lead alloy lead-free alloy [snpb - snpbag] [snagcu] pre-heating rate 2.5 c/s 2.5 c/s soaking temp. 120-180 c 140-180 c soaking time 80-120 s 80-180 s peak temperature 210-240 c 245-260 c reflow time above liquidus 40-80 s 40-140 s cool down rate < 6 c/s < 6 c/s peak temp. liquidus temp. pre-heating zone soaking zone reflow zone cool down zone time temp. peak temp. liquidus temp. pre-heating zone soaking zone reflow zone cool down zone time temp.
ordering information EMIF06-1502M12 8/9 5 ordering information 6 revision history part number marking package weight base qty delivery mode EMIF06-1502M12 e micro qfn 6 mg 3000 tape and reel (7?) date revision changes 12-dec-2005 1 initial release. 3-jul-2006 2 reformatted to current standard. changed figure 1 to show improved results.
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